Alif Semiconductor /AE302F80F5582AE_CM55_HE_View /SDMMC /SDMMC_BLOCKSIZE_R

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Interpret as SDMMC_BLOCKSIZE_R

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0XFER_BLOCK_SIZE0 (Val_0x0)SDMA_BUF_BDARY

SDMA_BUF_BDARY=Val_0x0

Description

Block Size Register

Fields

XFER_BLOCK_SIZE

Transfer Block Size. These bits specify the block size of data transfers. In case of memory, it is set to 512 bytes. It can be accessed only if no transaction is executing. Read operations during transfers may return an invalid value, and write operations are ignored. Following are the values for this bit field:

1 (Val_0x1): 1 Byte

2 (Val_0x2): 2 Bytes

3 (Val_0x3): 3 Bytes

511 (Val_0x1FF): 511 Byte

512 (Val_0x200): 512 Bytes

2048 (Val_0x800): 2048 Bytes

SDMA_BUF_BDARY

SDMA Buffer Boundary. These bits specify the size of a contiguous buffer in the system memory. The SDMA transfer waits at every boundary specified by these bits and the Host Controller generates the DMA interrupt to request the Host Driver to update the SDMMC_SDMASA_R register.

0 (Val_0x0): 4KB Bytes SDMA buffer boundary

1 (Val_0x1): 8KB Bytes SDMA buffer boundary

2 (Val_0x2): 16KB Bytes SDMA buffer boundary

3 (Val_0x3): 32KB Bytes SDMA buffer boundary

4 (Val_0x4): 64KB Bytes SDMA buffer boundary

5 (Val_0x5): 128KB Bytes SDMA buffer boundary

6 (Val_0x6): 256KB Bytes SDMA buffer boundary

7 (Val_0x7): 512KB Bytes SDMA buffer boundary

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